Development of the RISC-V ISA Formal Specification
The RISC-V community is perhaps unique in pushing for an early formal specification of the RISC-V ISA (Instruction Set Architecture), and to declare an intention that it will become the definitive spec of the ISA. A task group was set up within the RISC-V Foundation to develop this spec, with active contributions and participation from about a dozen organizations, representing academia and industry. The speaker (who chaired this group) will describe the technical and process challenges in converging on a community-driven, open, non-proprietary, industrial-strength ISA spec.
Sun 23 JunDisplayed time zone: Tijuana, Baja California change
11:00 - 12:30
|Development of the RISC-V ISA Formal Specification|
|Automated Formal Memory Consistency Verification of Hardware|
Yatin Manerkar Princeton University